Job Seekers Log In Or Register Here

Job Title- SOC Design Verification
Functional- IT Software - Application Programming / Maintenance
Industry-
Location- Kulim
Experience Range- - Years
About Us
Quess Global is a division of Quess Corp Limited, is a leading Global Integrated Business services provider operation in four broad segments: Global Technology Solutions , people and services , Integrated facilities management and industrials. Headquartered in Bengaluru, we have a pan-India presence with 65 offices across 34 cities, as well as operations in North America, the Middle East and South East Asia. As of December 31, 2016, we have over 158,000 employees across the globe. (BSE: 539978, NSE: QUESS) | http://www.quesscorp.com QuessGlobal Malaysia SdnBhd, is located at Q Sentral Building KL Sentral, Kuala Lumpur, Malaysia. | http://www.quessapac.com
About Company
Roles and Responsibility

Role                                                    :     SoC Design Verification

Work location                                  :      Kulim

No of positions                                :      1

Mode of employment                    :      Contract

No of Months                                  :      6

Mandatory Skills

 Working experience in SoC verification including but not limited to testplan development, test writing, debug, integration and familiar with verification methodologies such as OVM, UVM

     1.    Pre-silicon functional verification w/ strong system Verilog, OVM/UVM Knowledge  and random-constrained, coverage-driven techniques

     2.    Assertion Based Verification - Development of framework, Assertions and Debug.

     3.    Tools - VCS / NCSim.

     4.    Ability to understand the domain and module through specs and relate to the   trackers/ waveforms

   5.    Debug using Waveform, Trackers, Breakpoints .

    The below would be desirable skills 

     1. SOC Verification skillset inclusive of knowledge of Fuse Manager / Interrupt Manager/ Interconnect Bus protocols / System Manager

     2.Functional coverage - framework development, coverage regression and coverage analysis

     3. Exposure to Version Control tools - preferably GIT.

    4..Knowledge and implementation skills on constraint random verification approach

    5. Debugging expertize /know how on  tyical error scenarios - such as NOA, XMRE(cross module reference) , hanging simulations ,scoreboard errors

    6. Protocol Knowledge on any of the below areas would be a plus : SATA, PCIe, USB, Interfaces : I2C, SPI, UART

 

Desired Candidate