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Job Title- Senior Staff / Senior FPGA Engineer
Functional- Engineering Design / R&D
Industry- IT Enabled Services
Location- Penang
Experience Range- - Years
About Us
Quess Global is a division of Quess Corp Limited, is a leading Global Integrated Business services provider operation in four broad segments: Global Technology Solutions , people and services , Integrated facilities management and industrials. Headquartered in Bengaluru, we have a pan-India presence with 65 offices across 34 cities, as well as operations in North America, the Middle East and South East Asia. As of December 31, 2016, we have over 158,000 employees across the globe. (BSE: 539978, NSE: QUESS) | QuessGlobal Malaysia SdnBhd, is located at Q Sentral Building KL Sentral, Kuala Lumpur, Malaysia. |
About Company
Roles and Responsibility

Position                                                      :  Senior Staff / Senior FPGA Engineer

Work Location                                          :   Penang

Mode of Employment                             :   Permanent

Salary                                                          :  8000-15000



Job Description:



Job Description:

? Responsible for the design & development of highly-sophisticated communication

products such as Base Station, Router and Console products for Motorola Solutions

Infrastructure division.

? Responsible for micro-architecture, design, simulation, verification and test activities

associate with FPGA development. Responsible for the chipset selection to achieve

performance and cost goals.

? Design and implement industry standard digital communications protocols.

? Provide technical leadership and guidance to junior engineers in project execution and

technical issue resolutions.

? Work with a team of highly-qualified engineers across the globe (electrical, mechanical,

software) to generate innovative ideas and solutions that meet customer requirements.

Job Requirements:

? Bachelor’s Degree or Master’s Degree in Electrical/Electronics/Computer Engineering

with at least 6 years experience in product design and development (minimum 8 years

for Staff position).

? Hands on experience with FPGA design flow from Verilog RTL design, simulation,

verification, synthesis and static timing analysis.

? Experience in Xilinx/Altera softcore processor architecture and design implementation is


? Experience in implementing industry standard interfaces like Ethernet and USB.

? Experience with Source Control Management tools (like Sourceforge GIT) is an added


? Familiar with hardware development flow from schematic entry, layout, timing analysis to

design verification and validation. Experience in Cadence design flow is a plus.

? Experience in C programming and firmware development is a strong plus.

? Good command of written and spoken English.

Desired Candidate